|
General Description |
A7202A is a very easy-to-use CMOS RF Receiver for sub 1GHz license free ISM band (315/434MHz). It is an OOK/ASK single chip RF receiver with high sensitivity receiver (-110dBm @ 2.4Kbps, 315/433.92MHz). This device integrates a double balanced image reject mixer, low IF frequency (424KHz) architecture, IF filter, I/Q limiter with RSSI generation, as well as a fully VCO and PLL synthesizer. A7202A's carrier frequency FRF is determined by the frequency of the reference crystal FXTAL. The integer-N PLL synthesizer ensures that each RF value, ranging from 310 MHz to 315.5 MHz and 430 MHz to 438 MHz with PLL steps of 848KHz, can be achieved. This is done by using a crystal as a reference frequency according to: FRF = FXTAL x N / 32, where N is the PLL feedback divider ratio (N=743 for 315MHz band and N=1023 for 434MHz band, i.e. crystal = 13.5732MHz for 433.92MHz). Dut to AIF (Auto IF) function, user has no need to consider IF offset between TX and RX, but, just use this formula ( FRF = FXTAL x N / 32 ) directly to calculate RX radio frequency. For easy-to-use, A7202A has a special mode called HW control mode. In HW control mode, user just needs to apply pin setting for radio control, i.e. Band =1 for 434MHz and Band = 0 for 315MHz. DF1, DF2, DF3 (data filter pins) and DS (data slicer pin) applying proper capacitors for different data rate application (1K to 10Kbps) to get the best RX sensitivity. Hence, A7202A is very easy to use with a low cost MCU or decoder. Those features are all integrated in a small SSOP 20 pins package. For packet receiving, there is no RX FIFO inside A7202A. MCU (or Decoder) just needs to decode the coming packet (preamble + sync word + payload) from DATA_OUT pin. To get the best RX sensitivity, refer to section 9.6 for recommended preamble format to be 70% high and 30% low for this device. |